Electric insulation of 3C–SiC resistors · MEMS sensors for flow measurement in harsh environments

/2 Technological developments of 3C–SiC thermal devices/2.2 Electric insulation of 3C–SiC resistors

#2.2 Electric insulation of 3C–SiC resistors

The fabrication process and characterizations presented in the section prior confirmed the current leakage issue addressed by Dezauzier et al. (1995)¹⁰³, and the additional developments needed to manufacture SiC thermal MEMS. As the literature review above suggested, some additional work has to be done, and no technological process has yet emerged to massively produce SiC isolated wires at the MEMS level. This section explores a way of achieving electrical isolation of simple SiC wires, with two distinct methods, both relying on transferring onto borosilicate glass by anodic bonding, which is an electrically isolated substrate.

#2.2.1 Principle of anodic bonding

Anodic bonding is a wafer bonding procedure used to permanently seal sodium-containing types of glassTypically Schott BoroFloat® or Pyrex®.

to silicon (figure 2.10). The surfaces of both elements have to be mirror-polished and brought to atomic proximity. Pressure and heat is applied, to bring the glass close to its transition temperature, usually 350 to 400°C. An electric potential on the order of 1 kV is applied to the silicon side, and a depletion zone is created in the glass layer, close to the interface. A small electric current is induced by the migration of Na⁺ ions towards the anode, and O^2– ions towards the interface. The latter create Si–O–Si bonds at the interface, which permanently seals the two surfaces together.

Figure 2.10.
Working principle of anodic bonding.

The bonding process takes about fifteen minutes, and is monitored by the time evolution of the induced current i_\text{B}. The seal progresses in fronts at the interface, which causes this current to decrease. The process is considered done once the residual current is as low as 10 % of its initial value, which depends on the overall facing surfaces. The bonded stack is then slowly cooled down, and its structural integrity ensured by the fact that silicon and borosilicates have roughly the same thermal expansion coefficient.

For the work presented below, two anodic bonding platforms were used: a Süss SB8 anodic bonder available at the IEMN cleanroom, and a bespoke setup designed and assembled by our teammate Aurélien Mazzamurro (figure 2.11). It was developed to quickly perform wafer bondings outside of the cleanroom and avoid the crowded reservation schedules.

Figure 2.11.
Custom bonding setup built by Aurélien Mazzamurro, which served for anodically bond the SiC/Si stack to the glass wafer.

#2.2.2 Transfer to borosilicate glass on the SiC side

As Balakrishnan et al. (2018)¹⁰⁹ reported, it is possible to perform an anodic bonding step with a thin SiC interlayer between the two surfaces. Using a similar process, the idea is to transfer the epitaxially grown 3C–SiC sheet to a glass substrate, and be left with a SiC/glass stack, which can be etched as established before. This way, an electrically isolated SiC resistance could be fabricated.

Figure 2.12.
Fabrication flowchart for producing a SiC/glass stacked wafer with anodic bonding.

-> SiC/glass wafer

-> SiC/glass quality issue -> too much constraint bc thermal expansion coefficient is not the same?

-> Wire suspension ?

#2.2.3 Transfer to borosilicate glass on the silicon side

Anodic bonding is mostly used to perform a Si/glass interface bonding. While this would be of little advantage in the current configuration, i.e. performing an anodic bonding as-is to produce a SiC/Si/glass stack would not get entirely rid of the conducting silicon layer. However, reducing the silicon layer thickness to a reasonable amount, on the order of 10 to 100 µm, would enable a reasonable XeF₂ isotropic etch to physically separate “islands” in the silicon layer. This would result on a suspended wire, hold in place by separated silicon supports, themselves resting on the insulating glass substrate (figure 2.13).

Figure 2.13.
Fabrication flowchart for simple SiC suspended hot wires.

This method works but is not enough to build calorimetric probes because of lateral silicon etching.

#2.2.4

Figure 2.14.
SEM detail of a suspended and electrically isolated 3C–SiC resistance. The SiC layer flexes noticeably under its own weight, because of the large under-etching gaps underneath.

#2.2.5 SiC resistance measurement

Figure 2.15.
Electrothermal characterizations of SiC resistors produced by mechanical thinning and anodic bonding to borosilicate glass.

(a) Resistance and TCR evolution relative to the temperature for a 100 × 5 × 0.8 µm suspended 3C–SiC wire. An extrinsic domain (in green) appears, followed by an metal-like domain (in yellow).

(b) Corresponding Arrhenius plot of the relative resistivity change vs. temperature.