#Material properties

Silicon Carbide (SiC) is a compound of covalently bonded silicon and carbon atoms. It is a hard ceramic, originally used as an abrasive powder by Acheson (1893)⁶⁵ to polish diamond stones, under the name of carborundrum. The crystal structure of SiC presents polytypism, which is a special case of polymorphism where the two-dimensional translations are preserved. All polytypes are composed of the same planar structure, a pavement of silicon tetrahedra with central carbon atoms. Different SiC polytypes are different vertical stacking patterns of this base plane. Although there are more than 250 identified SiC polytypes, the only commonly used in the industry are 3C–SiC (\beta-phase, the only known cubic phase), 4H–SiC and 6H–SiC (\alpha-phase), due to the ability to synthetize them in wafers or thin films (Mehregany et al. 2000)⁶⁶.

Table 1.1 displays some mechanical, electrical and thermal properties of 3C and 6H–SiC, compared to those of silicon and diamond. SiC generally shows excellent mechanical robustness thanks to its high Young’s modulus, as well as exceptional thermal and chemical stability. At ambient temperature, 3C–SiC is stable, then transforms to 6H–SiC at 1 700 °C, which is stable up to the sublimation point at 2 830 °C. Above 1 200 °C, SiC oxidizes in air in presence of water vapor, as follows: \text{SiC}~+~2\text{O}_2 \longrightarrow~\text{SiO}_2~+~\text{CO}_2. However, the oxidation rate is very low relative to Si, and it results in the development of a thin, stable SiO₂ surface layer.

#SiC coatings for hot and oxidative environments

The exceptional mechanical and thermal properties of the common SiC polytypes make them attractive to use in critical parts of gas turbine engines. Inside a jet engine, turbine blades face the harshest conditions. As their function is to power the drive shaft, they are subjected to the hot exhaust gases expanding from the combustion chamber, as well as extreme centrifugal forces due to rotational speeds. Typical requirements involve 1 700 °C temperatures, 1.25 Mach speed, 10 bar pressure and particle erosion/corrosion (Spitsberg & Steibel 2004)⁷⁰. Material scientists have engineered high-performance alloys and single-crystal grow processes for the bulk of the turbine blades. However, the conditions being hotter than the phase transition of the alloy, and as debris corrosion would wear out the part, a surface treatment is applied to produce a hard insulating shell. Silicon carbide is often used as the outer coating layer, in the form of weaved fibers which are fixed to the surface by a pyrolysis treatment (Zhu 2018)⁷¹.

To give another example of SiC usage as a thermal protection outer shell, the wing leading edges of the space shuttles were tiled with a composite material called RCC. It is a stacking of different graphite layers, which are coated with SiC to provide a hard shell as well as thermal oxidation protection.

#SiC as a CMOS alternative for solid-state electronics for high temperatures and radiative environments

The CMOS technology has a working temperature range between –50 and 125 °C inherently due to silicon’s 1.2 eV bandgap. In particular, this means that above 125 °C, the intrinsic carrier concentration generated in the conduction band is too high for a MOSFET to properly insulate in the off state. As a consequence, any conditioning circuit or logic controller has to be deported if the environments are too hot, which is detrimental to sensor performance, according to DARPA’s HOTS project statement. Silicon carbide benefits from a much wider bandgap, and alongside other wide bandgap III/V compounds like GaN or AlN, is investigated as a CMOS alternative both for high-power and high-temperatures. Additionally, wide-bandgap digital CMOS would be much less prone to spontaneous bit flips due to ambient radiation levels, which is particularly substantial in space or nuclear applications.

In the late 1980s, University of North Carolina initiated the developments to use SiC for electronic devices. A MOSFET was sucessfully made from a 3C–SiC film deposited on 6H–SiC by Palmour et al. (1988)⁷². In 1986, Palmour and his collaborators founded Cree Inc., to insert into the new market created by wide bandgap semiconductors, and patented several SiC MOSFET designs (Palmour 1993)⁷³, (Palmour 1996)⁷⁴. In parallel, Cree took profit of SiC’s wide bandgap, which allows light emission in the blue part of the spectrum, to commercialize the first blue LED (Edmond 1990)⁷⁵. However, the SiC-based blue LED was so inefficient that the true revolution in lighting technology occurred in 2014, with the invention of the GaN LED by Shuji Nakamura. Cree Inc., renamed Wolfspeed in 2021, is currently the market leader on silicon carbide wafers and films, and SiC power components.

#Early SiC MEMS

Mehran Mehregany, who worked at MIT at the time of the first WSS sensor developments, pioneered the technological developments for SiC MEMS aimed at harsh environment applications (Mehregany & Zorman 1999)⁷⁷. After his thesis work on micromachined silicon mechanisms at MIT, he transposed a commercial accelerometer process to make a WSS balance, at CWRU (Pan et al. 1999)⁷⁸. In the late 1990s, his team partnered with GRC in an effort to develop a technological field around smart jet engines (Mehregany et al. 2000)⁷⁹, which means implementing flow control strategies in jet combustion chambers. They successfully used microfabrication techniques to fabricate SiC atomizers for fuel injection, which require very low tolerances and resistance to abrasion. They tested them at high pressure and erosion rates, and concluded that SiC outperformed silicium and nickel in that particular use case (Rajan et al. 1999)⁷⁶.

#Silicon Carbide electronics and sensors at Glenn Research Center

The CWRU / GRC collaboration enabled the developments of a vertical APCVD reactor for SiC film growth (DeAnna et al. 1998)⁸¹ on 4-inch wafers, laying the groundwork for a SiC technological field both for sensor and microelectronics.

In the early 2000s, Mehregany’s team successfully created a resonant floating mass by depositing APCVD poly-SiC on a SoI wafer, defining an Al etch mask for RIE patterning of the SiC layer (Roy et al. 2002)⁸⁰. A capacitive transduction scheme was used, similarly to MIT-like WSS balances. The device was characterized in resonant frequency and SiC/Si thermal expansion coefficients, up to 1 000 °C. Ni bond pads and wire-bonding were used to withstand the high temperatures, as its 1 455 °C melting point far exceeds that of gold (1 064 °C). Iterating on this work, Rajgopal et al. (2009)⁸² fabricated a poly-SiC accelerometer, characterized for a range of 5000 g and 18 kHz bandwidth.

Over the same period, Robert Okojie’s team at Kulite Semiconductors Products started working on pressure diaphragms for high temperature applications. They reported a 6H–SiC design withstanding 500 °C conditions (Okojie et al. 1998)⁸³. Foreseeing the technological potential, the company patented several SiC-based pressure transducer designs in the 2000s (Kurtz & Ned 2001)⁸⁴, (Kurtz 2009)⁸⁵. Robert Okojie joined the silicon carbide research group at GRC in 1999, where the first CVD single-crystal SiC films were deposited on silicon (Nishino et al. 1983)⁸⁶. His has considerably developed the sensor and electronics technologies since then, particularly aiming at gaining TRL for the SiC devices. In 2006, he patented a complete packaged system comprising a SiC piezoresistive cantilever anemometer (similar working principle than fences or pillars), including the sensing elements, fabrication process and packaging solution (Okojie et al. 2003)⁸⁷. In the following years, he publishes reports on SiC device manufacturing methods at GRC, called “CLASSiC” (Okojie 2005)⁸⁸, which enabled to batch manufacture SiC pressure sensors, accelerometers and cantilever anemometers. Simultaneously, he reports the full fabrication, packaging and characterization at 600 °C of the patented anemometer (Okojie et al. 2004)⁸⁹ (figure 1.19).

Simultaneously, Robert Neudeck’s team at GRC successfully demonstrated the prototype for a 6H–SiC-based JFET, able to withstand thousands of hours in a steady 500 °C environment with unprecedently low rates of failure (Neudeck et al. 2009)⁹⁰.

As the CLASSiC process could not be implemented to \alpha phases of SiC, Okojie presented an uncooled 4H–SiC piezoresistive pressure sensor functioning up to 800 °C, aimed at closer insertion to jet engines combustion chambers to quantitatively monitor the combustion dynamics (Okojie et al. 2015)⁹¹.

#SiC technological field in Europe

The increasingly promising opportunities offered by SiC for electronics and MEMS also attracted actors in Europe, where technological activities were created in the early 2000s. Ernst Obermeier’s team at TU Berlin, who did significant work for wall-mounted hot-wire sensors developed above, pioneered the fabrication of a pressure membrane made of 3C–SiC heteroepitaxially grown on a SoI wafer at Cree Inc (Zappe et al. 2001)⁹². They intensively studied the mechanical properties of 3C–SiC films for membrane applications (Pabst et al. 2012)⁹³.

The University of Edinburgh started to develop dry etching processes for 4H–SiC (Jiang et al. 2003)⁹⁴. They collaborated with Mehregany and Zorman at CWRU to produce electrothermally actuated SiC cantilever beams (Jiang et al. 2006)⁹⁵ from a 3C–SiC layer heteroepitaxially grown on silicon. They iterated on this technology, and very recently reported (as of 2026) a sucessful picogram mass measurement under steady 400 °C conditions, using an interferometric measurement method (Zhang et al. 2026)⁹⁶.

Another European collaboration between the GES in Montpellier, Aristotle University in Thessaloniki, Greece and Universitat de Barcelona started characterizing 2.5-µm 3C–SiC films heteroepitaxially grown by Cree (Stoemenos et al. 1995)⁹⁷. In order to produce SiC films in France, the CRHEA started a technological activity in 2000, with the creation of a new CVD reactor (Leycuras 2000)⁹⁸ aimed at producing the conditions for SiC growth on 2 mm silicon wafers. After the developments of an adequate process, they investigated the stress distribution at the SiC/Si interface to reduce the resulting wafer bowing (Zielinski et al. 2007)⁹⁹. In collaboration with the GREMAN, they developed a novel microfabrication process to produce thin SiC membranes, both with \langle 100\rangle and \langle 111\rangle crystallographic plane orientations (Michaud et al. 2013)¹⁰⁰, (Michaud et al. 2016)¹⁰¹, by depositing a LPCVD SiC/Si/SiC heterostructure on a silicon wafer. This process unlocked the fabrication of SiC-based CMUTs (Portail et al. 2022)¹⁰².

#3C vs. 4H vs. 6H–SiC

Although the mechanical, thermal and chemical properties of 3C, 4H and 6H–SiC are quite similar and offer comparable advantages in their use for harsh environments, their different crystallographic structures lead to process-specific constraints. The main technological aspect to consider is the film/substrate compatibility. Poly-SiC can be grown through APCVD, as demonstrated by the floating masses microfabricated at CWRU, and amorphous SiC films have been sputtered on fused quartz at Griffith University (Dinh et al. 2015)¹⁰³. However, the growth of monocrystalline SiC, which h, needs more precise film/substrate compatibility. Currently, the hexagonal 4H and 6H polytypes can only be homoepitaxially grown on their respective substrates. In that case the heterogeneity is brought by the doping type and level, as recent work reports the use if a p-type layer homoepitaxially grown onto an intrinsic 4H SiC substrate for a hot-film-like flow sensor (Dinh et al. 2019)¹⁰⁴. On the opposite, 3C–SiC crystallizes in a cubic ZnS-type structure, which makes it heteroepitaxially growable on silicon. 3C–SiC presents a 4.3596 Å lattice constant, whereas that of silicon’s diamond structure is 5.4310 Å, resulting in a \approx 20 % mismatch. This quite large lattice mismatch results in high film strains, which have been reduced using different techniques detailed below.

Because the chemical heterogeneity of heteroepitaxy gives much more flexibility for MEMS manufacturing than homoepitaxy, the following paragraphs focus on establishing a state of the art of 3C–SiC/Si sensors where the film serves an electrically active function.

#Requirements for wall-mounted wall shear stress sensors

In the early days of SiC investigation in France, a collaboration between the CEA-LETI and Université de Montpellier reported a preliminary study on the potential of 3C–SiC heteroepitaxy on silicon for sensing applications (Dezauzier et al. 1995)¹⁰⁵. They emphasized that in order to be used for high temperature applications, the 3C–SiC film needed to be electrically insulated from the substrate. As a consequence, producing SiCoI wafers was critical, and the CEA-LETI patent on the Smart-Cut process, then used to produce SoI wafers (Bruel 1994)¹⁰⁶, served to produce such SiC films on large 100 mm wafers (Di Cioccio et al. 1997)¹⁰⁷, with a perspective to access the already existing production-scale facilities for silicon. In 1995, the company NovaSiC was created to exploit the intellectual property generated by this SiCoI method. In 2021, they were acquired by Soitec, the company created for SmartCut wafers. Currently, they produce SmartSiC wafers and offer post-processing services, like SiC polishing.

Therefore, considering the current state of the art in WSS sensors and SiC MEMS devices, an ideal technological process must meet at least the following three constraints to realize a thermal wall shear stress sensor.

1. Electrical insulation of the active elements. Because a thermal anemometer is electrically heated, the sensing material should be made with a completely electrically insulated pattern. In a calorimetric design, this applies to the surrounding measurement resistors too.

2. Free-standing structures. In a similar manner to the current insulation, the heating and sensing elements should also be thermally insulated from the substrate. Because end-conduction effects are unavoidable and can only be minimized by reducing the thermal conductivity of the material itself, the contact area with the substrate should be as small as possible.

3. Flexibility in design. In order to make the process iterable toward more complex architectures, the active elements should be easy to place in the design. Particularly, to make a calorimeter, three wires should be placed in close proximity.

#SiC thermal devices developed by Griffith University

A review of the literature suggests that Nam-Trung Nguyen’s team at Griffith University appears to be the only group have consistently reported developments in SiC-based thermal anemometry. In the late 2000s, Griffith University developed a technological platform on SiC, notably through a CVD process for SiC/Si thin films (Yu et al. 2007)¹⁰⁹, (Yu et al. 2007)¹⁰⁹. In 2015, Nguyen’s team investigated the thermoresistive properties of a LPCVD amorphous SiC film deposited on fused quartz (Dinh et al. 2015)¹⁰³ (figure 1.21). The resistance, measured over a 25 × 25 mm patch by depositing Ni ohmic contacts, presented high values (3 MΩ at ambient temperature), decreasing with the temperature, indicating a large negative TCR between –15 000 and –5 000 ppm/K. The same year, a similar study was conducted with a single-crystalline p-doped 3C–SiC film heteroepitaxially grown on silicon (Dinh et al. 2015)¹⁰⁸. The resistance decrease was of similar shape, but in the kΩ-range, with a corresponding negative TCR between –6 000 and –2 500 ppm/K. In order to successfully measure an electrical resistance, they manually transferred each 3C–SiC pattern with FIB implantation, onto a SiO₂ substrate (figure 1.22).

After 2015, Nguyen’s team investigated ways to batch microfabricate insulated SiC resistor, i.e. make SiCoI wafers. Although polycrystalline SiCoI has successfully been made at GRC, the mechanical and thermal properties are far better with monocrystalline SiC (réf. nécessaire). 3C–SiC nanowires were successfully insulated on a SiO₂ layer by Phan et al. (2017)¹¹⁰, by dry etching of the SiC epitaxial layer to shape the wire and isotropic oxidation the silicon substrate, with the oxide layer overflowing underneath the wire (figure 1.23). In 2018, the same team reported the fabrication and characterization of a thermal calorimetric flow sensor, by anodically bonding a 3C–SiC epitaxy SiC-side to a borosilicate glass wafer.